Contacts and first level interconnects in integrated circuits may be formed by photolithographically defining areas to be etched. For example, contacts may be formed by exposing contact areas in a contact photosensitive layer, followed by developing the contact photosensitive layer to form a contact etch mask, and subsequently etching a dielectric layer to form contact holes and filling the contact holes with contact metal. Similarly, metal first level interconnects may be formed above the contacts by exposing interconnect areas in an interconnect photosensitive layer, followed by developing the first level interconnect photosensitive layer to form a trench etch mask. It may be desirable to use photolithographic equipment to expose the contact photosensitive layer and the interconnect photosensitive layer which has a spatial resolution limit which is larger than the separation between some contacts and/or some first level interconnects, for example in instances in which photolithographic equipment with a smaller spatial resolution limit is more expensive.